1. Field of the Invention
The present invention relates to a high-frequency surface mounted device (SMD) transistor having two emitter terminals in which a semiconductor transistor chip is secured upon a lead frame and is contacted to electrical terminals on the lead frame, and to a lead frame for the SMD transistor.
2. Description of the Prior Art
In particular, the present invention relates to SMD device having the format SOT-143 as generally illustrated in FIGS. 1 and 2 in which FIG. 1 illustrates, in a plan view, a SMD component having the SOT-143 format. FIG. 2 illustrates an end view of the same electronic component of FIG. 1.
In FIG. 1, electrical terminals 1-4 are illustrated for an SMD component. The electrical terminal (PIN) 1 thereby usually references the collector. The electrical terminal 4 usually references an emitter terminal. In a first embodiment of the SMD component, the electrical terminal 2 can reference a further emitter terminal and the electrical terminal 3 can reference a base terminal. In a second embodiment of the SMD component, the electrical terminal 2 can reference a base terminal and the electrical terminal 3 can reference a further emitter terminal.
Bipolar, high-frequency broadband transistors having the SOT-143 format with four electrical terminals 1-4 achieve noticeably greater amplification at high frequencies when compared to SMD components having the SOT-23 format that only has three electrical terminals, this because of reduced emitter-lead inductance and because of reduced capacitive coupling between the collector and the base.
In known high-frequency SMD transistors having two emitter terminals, a semiconductor transistor chip is seated on a lead frame. The semiconductor transistor chip is usually electrically connected to the two emitter terminals of the SMD component via two electrical bond wires.
FIGS. 3-11 illustrate applied examples of various semiconductor chips in combination with standard lead frames. In the smaller figures of applied examples, respective electronic SMD components each have respectively four electrical terminals 1-4. In FIG. 3, two semiconductor chips are secured on the electrical terminal 1 and the respective semiconductor chip is secured on each of the electrical terminals 2 and 4. In FIG. 4, two semiconductor chips are secured on the electrical terminal 1 and one semiconductor chip is secured on the electrical terminal 2. In FIG. 5, a single semiconductor chip is secured on the electrical terminal 1. This single semiconductor chip is contacted via bond wires to the electrical terminals 2-4. In FIG. 6, a respective single semiconductor chip is secured on each of the electrical terminals 1 and 2. In FIG. 7, a respective single semiconductor chip is secured on each of the electrical terminals 3 and 4. FIG. 8 illustrates a lead frame having the electrical terminals 1-4 before the fastening and contacting of semiconductor chips on the lead frame.
FIGS. 9-11 illustrate three applied examples in which, respectively, a single semiconductor chip is secured on the electrical terminal 1. In the three applied examples of FIGS. 9-11, respectively two bond wires are employed for contacting the semiconductor chip to two emitter terminals of the SMD component. In these three applied examples of FIGS. 9-11, respectively two emitter terminals are conducted out of the envelope of the finished SMD component when the SMD component is finished. In FIG. 9, the two electrical terminals 2 and 4 form respective emitter leads. The semiconductor chip is contacted to the two electrical terminals 2 and 4 with, for example, a "double nail head". In the applied example of FIG. 10, the semiconductor chip has two emitter contacting spots. These two emitter contacting spots are each respectively electrically connected to one of the two emitter terminals 2, 4 via bond wires. In the applied example of FIG. 11, the semiconductor chip is electrically connected to the two emitter terminals 3, 4 via bond wires on the basis of a double nail head method.
The method according to FIGS. 9 and 11 of pressing two nail heads against one another on a semiconductor chip is all the more critical in high-speed automatic contacting units the smaller the contacting areas or, respectively, wire diameters are selected. In the applied example of FIG. 10, the two contacting spots that are arranged side-by-side on the semiconductor chip can be faultlessly contact in terms of process technology. The two contacting spots, however, must be arranged at a defined distance from one another, this leading to an increase in the size of the semiconductor chip dimensions and, therefore, to an increase in expense. Also added thereto is the negative influence of the collector-emitter capacitance of the contacting spots on the gain or amplification of the SMD component in the region of high frequencies, for example in the region of 2 GHz.